With the advent of high channel count EEG recording using 64, 128, or 256 channels there is renewed interest in attempting to minimize the cost, size, weight and power consumption of complete amplification and data acquisition systems. The ideal solution would be a system that could be worn on the body with a single tether, or a wireless connection, to transmit data to a storage device. The only way to achieve this level of miniaturization is to design custom integrated circuits. We propose an overall goal of designing and building a complete EEG system on a chip (or a small number of chips). To reduce cost and power consumption we will use CMOS processes. Given this constraint, the most difficult part of the design will be to create a low- noise front-end amplifier, which we will attempt in the Phase I project. We will design and prototype, using the MOSIS service, an integrated circuit amplifier with characteristics suitable for amplifying scalp EEG. This circuit will then be tested and compared to our existing amplifier and other commercial amplifiers. In Phase II we will design and produce complete acquisition systems on a chip by adding filtering, sample/hold, multiplexing and analog-digital conversion. PROPOSED COMMERCIAL APPLICATIONS: The proposed miniature integrated circuit EEG data acquisition chip would become the basis for a line of inexpensive, low power, wearable multichannel EEG data acquisition systems for research and clinical use. They would be particularly attractive for long-term monitoring in sleep and epilepsy, cognitive workload studies in space and industrial environments, emerging neuromonitoring applications, as well as in traditional research and clinical settings.